Help: ICE_FLAGS

Flags are typically specified in the config string with either a comma ","
or vertical bar "|" as a separator.  They modify the standard behavior of
the library routines as noted.  The ICE Midas primitives take a FLAGS switch
to add flags to the current config string.  For instance:

  SOURCEPIC/flags=(VHS|MUXCLK=A|MSBI)

NOTE: The flags argument in the ioport() routine are NOT for tuner flags. 
      The tuner flags must be placed in the config string.  

Clocking:
  MUXCLK=S - IOC code allowing choice of 6 on-board clock sources
  INTCLK - Internally generate clock for IO modules (same as MUXCLK=I)
  CLKI - Invert input clock
  CLKRE - Latch data on Rising Edge of Clock instead of default falling edge
  NCCLK - Normally, the 1st clock cycle is used to synchronize the enabling of a
  PREFX - This option uses the eXternal or clock pin as a reference for the Programmable Clock
  QREF=F - Specifies the non-standard value of the QSFP reference clock in Hz or MHz
  QLR=F - Specifies the non-standard value of the QSFP Line Rate in GHz
  CCLK=F - Specifies the non-standard value of the CCLK crystal in Hertz.
  DEGLITCH - Enables deglitch circuit for MUXCLK inputs
  CLKDLY=N - Delays input clock by N nanoseconds for clock/data deskew
  PRETRIG=N - Capture N cycles before trigger
  PMTHROTTLE=N - throttles Processor Module output to n Mby/s
  SSC - use spread spectrum clocking for IO Module interface

Data Routing:
  MSBI - Invert the Most Significant Bit
  LSBX - Replace the LSB with the data on the eXternal sync pin
  LSBP - Replace the LSB with the data on the 1PPS sync pin
  BIGEND - Invert the bit packing order on SP data
  BIT=N - Which bit for single bit acquisitions (0,1,4, or default=15 the MSB)
  MBITS=N - When using a Tuner or Core port, this can be used to specify a non-default data
  NBITS=N - When using a tuner with a presampler, MBITS sets the Module bits (Presampler input)
  ALT - Use alternate numbered port as source of data
  INP=N - Use input n=1 or input n=2 to feed the port
  PORT=PORT - This specifies the default port type and index for the pic_ioport() library.
  IPORT=PORT - This specifies a non-default input routing for a CORE or TUNER port
  OPORT=PORT - This specifies a non-default output routing for a CORE or TUNER port
  DELAYPORT=PORT - Select which ports 1=oddTuners 2=evenTuners or 3=allTuners (fed by port1) to
  HXFD - causes the DMA cross-bar to frame decimate the HX ports before going to DRAM.

Triggering:
  SGO - Slave acq/playback start to opposite channel acting as master
  RGO - Ready acq/playback to start with channel on the same side.
  TGO - Use bit0 (or ext SMB if XGO and TGO) to trigger start
  GGO=N - Use bitN (or ext SMB if XGO and GGO) to gate the input clock
  XGO - Applied with TGO, GGO, or SGO to use external sync SMB
  XTGO - Shorthand for applying XGO and TGO.
  XSTGO - Shorthand for applying XGO, SGO and TGO.
  MTGO - Use the Module's external sync SMB to trigger start.
  MTGOOFF=N - Use the previous 1 PPS to preload the waveform to start at the
  XSOE - Enable external sync SMB output
  XSTRM - Enable external sync 50ohm termination (on PIC8+)
  XSTP - Use the internal test port on the PIC5 to implement the XGO trigger
 
Filters:
  CFIR=NAME - Load the named file into the tuner Coarse (post CIC or CIC correction) Filter.
  RFIR=NAME - Load the named file into the tuner Resampler Filter
  PFIR=NAME - Load the named file into the tuner Programmable (post CFIR or final output) Filter.
  FFIR=NAME - Load the named file into the special Filter Only Core
  LUT=NAME - Load the file named "lut_^name" into the post-tuner LUT-based demod.

Tuners:
  CHNS=N - Specify the number of configured tuner channels.
  CPC=N - Specify the number of channels per tuner chip
  FIRONLY - Bypasses the front end of the FPGA based tuners (PIC5+)
  UFILT - Use the user defined programmable (PFIR) filter in tuner chips
  UCFIR - Use the user defined coarse (CFIR) filter in tuner chips
  URFIR - Use the user defined resampler (RFIR) filter in tuner chips on PIC5 boards
  NCFIR - Use the narrow-band CFIR coefficients on Graychips.
  PFIR4 - Decimate by 4 instead of 2 in PFIR stage on Graychips.
  OVSR=N - Set the tuner oversampling factor to N
  AOVSR - Automatically apply oversampling ratio to allow lower tuner decimation.
  POVSR - Use Post OVSR input rate as the basis for decimation and frequency parameters.
  DSYNC - Turn off tuner NCO dither function
  FSYNC - Synchronize tuner frequency changes
  TALT1 - All tuners on INP=1 to make a SLIC3 act like half of a PIC4T
  ITDEC - Allow independent tuner decimation for each channel on a GC4016.
  ITFMT - Allow independent tuner format (SI|CI) for each channel on a GC4016 chip
  ITCPC - Allow independent tuner Channels Per Chip (CPC=1|2|4) for each chip on a DTDM or DTDMX.
  RESAMP - Enables digital resampling in the tuner
  PRESAMP - Enables digital resampling in a tuner core placed in front of this resource
  PRETUNE - Normalized frequency for presampler
  PREGAIN - Gain for presampler tuner
  PRER2C - Enables digital Real to Complex conversion in the R2C core placed in front of this resource.
  NORESMON - Disable the PIC5 tuner resampler M over N circuit in favor of a straight
  TCLK=N - Sets the internal clock frequency for the Graychips on DTDM/DTDMX modules
  ZFSO4 - Set the tuner center zero freq relative to Fs/4 when using a tuner with real input.
  PMWBT - Use WideBandTuner mode on Processor Modules
  PMWBTR - Use WideBandTuner with WideBandResampler mode on Processor Modules
  FTTM=N - Fast Tuner Transform Mode controls various bank of tuners algorithms.

RF Parameters:
  RFFREQ=FREQ - Apply RF frequency in MHz on appropriate modules
  RFBW=FREQ - Apply RF bandwidth in MHz on appropriate modules
  RFATTN=DB - Apply RF attenuation in dB on appropriate modules
  RFGAIN=DB - Apply RF gain in dB on appropriate modules
  RFEXPERT - Use EXPERT mode to apply RFATTN and RFGAIN at the part interface.
  RFOPTS=(LIST) - Specify list of options as RFOPTS=(A|B|C) where current list includes:
  XCVR=X - Define the alias for a transciever that is connected to an IO module for automated control.
  XCF=X - Output center frequency of upstream transceiver in GHz.
  XCFINV - Upstream transceiver spectrum is inverted.
  A2DOPTS=(LIST) - These are currently only parsed for the A2DM14 through A2DM18 modules.
  DCSBN=N - Order of exponential averaging in DCS algorithm

High Speed:
  HS - Use HighSpeed DMA link port mode (automatic for module/tuner ports).
  DUAL - Use two link ports per module (automatic when xfer rate > 38Mby/sec).
  QDRX=PORT - Uses both byte lanes per IO module to transfer data at 2x the rate.
  PACK12 - Pack 16 bit data as 12 bit in the IO Module to allow faster sample rates
  UP12 - Unpack 12 bit data into 16 bit in the X-bar to keep host buffers as 16 bit.
  VHS - Use SHARC link ports in 48 bit mode for maximum transfer rates.
  MEM=ALL - Specify card circular buffer memory to use ALL available
  MEM=EXT - Specify card circular buffer memory to use extended memory
  CSIZE=N - Specify card circular buffer memory in 1K byte blocks.
  COFFS=N - Specify card circular buffer memory offset in 1K byte blocks.
  FRAMEDELAY - Delays output of frame decimated output by one frame
  A2DPORTS=N - Number of active ports on an A2Dm18 dual site module:

Debug:
  VERBOSE=N - Print commands/status to screen (for debugging)
  NOLOCK - Bypass multi-user locking mechanism (for debugging)
  PKTBLK=N - Sets blocking factor for output to emulate 10G switch fabric behavior.
  NOCLKM - unknown
  TO=N - Timeout value in seconds for DMA_WAIT function
  TP=N - Test Port number
  TPOE=N - Enable Test Port output on 5+ series cards
  PMTPOE=N - Enable Test Port output on processor modules
  B32 - Only use lower 32 bits of PCI bus (ES45 hot-swap PCI workaround)
  FORCE - Force reload of all programmable devices
  MODDEBUG=N - Puts IO Module in Debug mode

Config:
  NODE=ADDRESS - Specifies the node name this device is plugged in to
  SIDE=INDEX - Select a specific side=1 or side=2 of the card
  IOC=SIG - Specify name of IO Controller file to load during a reset
  IOM=IOMT_NAME - Specifies the type of IO modules on this card by name
  IOMFPGA=SIG - Specify name of an FPGA load file to program the IO module
  PM=PMT_NAME - Specifies the type of Processor modules on this card by name
  PMI=PMINDEX - Specifies the index of the processor module on this card to use for tuner and core resources
  PMFPGA=SIG - Specify name of an FPGA load file to program the processor module
  NOPM - Specify that there are no Processor Modules on this PIC4X card
  FLASHPORT=ID - Specifies which port to connect to for flash functions.
  BIDIR - Allows Bi-directional modules to be used as input or output without changing
  PRC=SIG - Specify name of PRoCessor load file to use, default is "def"
  PPC=SIG - Specify name of PowerPC load file to use on a Processor Module, default is "def"
  IOMWAIT=SEC - Number of seconds to wait after module reload for configuration discovery.
  NOLOG - Turn off automatic temperature logging except at card reset.
  GPSMODE=MODE - Sets non-standard behavior of the GPS module.
  GPSOPTS=(LIST) - Specify list of options as GPSOPTS=(A|B|C) where current list includes:
  GPSDFN=FN - Specify a Dump FileName for the GPS unit for debugging.
  FFT=(LIST) - This flag configures the FFT core parameters.
  CORE=(LIST) - This flag configures the generic CORE parameters.
  PCICAP - When applied during a reset, this enables PCIe packet sizes larger than the default 128by.

TimeCode:
  TC=MODE - Set the timecode mode as described in the help on pic_tc.
  OKNC - Turn off clock loss detect circuit.
  OKNTPERR - Turn off NTP tolerance of within +-250mS check.
  NOTCFILL - Do Not require fill bits prior to barker in SDN and DTL modes
  OPPSOFFSET=N - Number of clock cycles offset between the 1PPS signal capture and the data capture.
  ATCCALIB=N - Additional timecode calibration in units of post tuner/core samples
  LEAPSECDOY=N - This tells the ICE libraries that there will be a mid-year leap second on DayOfYear=n

Network:
  IPVLAN=VLAN - Specify the Default Virtual Local Area Network address for this UDP module
  IPADDR=IP - Specify the IP address of this UDP module
  IPADDRX=IP - On a PAC, an X in the ip string is substituted with 1 through 4 for each QSFP fiber.
  IPCONN=IP - Specify the IP address of for the UDP module to connect to
  IPDISC=IP - Specify the IP address of for the UDP module to disconnect from
  IPDEST=IP - Specify the IP address of for the UDP module to send to
  NFPS=N - Number of fibers per stream on a multichannel QSFP output
  NCPA=N - Number of channels per address on a multichannel QSFP output
  NCPS=N - Number of channels per stream on a multichannel QSFP output
  PKTLEN=N - Number of data bytes per packet
  PREDELAY=N - This option throws away the first N milliseconds of SDDS data packets that are received after the JOIN.
  TGPORTS=N - Number of active Ten Gig Ethernet ports on a TGSXD dual site module:
  OUID=N - Organization Unique ID for Vita Packets if not the ICE ID of 0x104D77.
  UOPT - User OPTion - In SDDS modes, leaves ICE/SDDS headers in stream and disables data reformatting
  IGMPTIMER=N - Causes the NIO port to resend the IGMP message every N seconds even though data is flowing.
  MAXGBERATE=N - Maximum GPE rate in Gbits/sec per fiber before automatically splitting across multiple fibers.
  MUXGBE=N - Number of fibers to spread stream across to meet data rates greater than MAXGBERATE
  MUXGBESIP - Use a single IP for all fibers in a MUXGBE stream

NetIO:
  NIOP=N - Number of Network IO Ports on this devIce.
  NIO=TYPE - Packet type for Network IO (ICE,SDDS,VRT,VRTL,VRTX)
  NIOC=N - Number of channels in this DMA multichannel port
  IPADDR#=ADDR - IP Address for one of the four 10G ports on the QSFP (where #=1:4 SFP index)
  NIOA#=ADDR - Multicast Address of this channel output (# is optional multichannel index)
  NIOACTL#=ADDR - Multicast Address to send DIFI control flow packets for buffer management
  SID#=SID - Stream ID for Vita49 packet mode (# is optional multichannel index)
  VCTX=0|1 - Enable or disable Vita49 Context Packets - once per second
  VCTL=RATE - Enable or disable Vita49 Flow Control Packets at  Hz
  SR#=RATE - Override computed Sample Rate in MHz (# is optional multichannel index)
  PKTASIS - Pass the filtered UDP packet through without processing

Network Debug:
  RXICESDDS - The default SDDS mode (Native Mode) for proper tuner|module operation and timecode interpretation.
  RXRAWDATA - Bring In Every And All Packets Data/Headers.
  RXRAWBURST - Bring In All Packet wout/Tx Response.
  RXRAWSDDS - Bring In Only SDDS Packet Header & Data, NO UDP,IP Hdrs.
  RXSDDSDATA - Bring In Only SDDS Data, No Headers
  RXPKTSDDS - Bring In Data With ICE (8 Byte) & SDDS Headers And SDDS Data Without Need For IIS or IOS Download
  RXALLOWPRYPKT - Allow Acquisition Of SDDS Parity Pkts.
  RXALLOWNSPKT - Allow Acquisition Of Non-Standard SDDS Pkts.
  RXSTRICTOFF - Allow Multiple MC Joins.
  RXNOSEQFILL - Do NOT insert filler for dropped SDDS packets based on sequence checks.
  RXTCBSWAP - Swaps bits 0 and 3 in 16 bit SDDS packets to move TimeCodeBit=3 into selectable bit=0.
  TXRAWDATA - Send Out Packets With 1080 Bytes Of Data, All From User, SDDS Hdr Not Generated
  TXRAWSDDS - Send Out Packets With SDDS Hdr (56 Bytes) Generated By Module, 1024 Bytes From User
  TXVLANOVRIDE - Enable protected VLAN range used to insert a signal into the SDDS network
  SDDSLEAK=N - Leaks the SDDS packet data at the nominal rate to prevent tuner starvation at low
  NOLINK - Disable link negotiation.

SrvIce:
  CARD=N - config string for card N is inserted here
  PORT=PORT - port on card to use (ie MODULE1,TUNER2,TBANK21)
  RATE=RATE - sample rate in Hertz
  BITS=BITS - sample size in bits
  LENGTH=LEN - length of circular memory buffer in seconds
  DIR=IO - direction of transfer (<0=input >0=output)
  XFER=LEN - transfer length in bytes
  FUNC=FUNC - argument to pic_dmafunc (-2=continuous, >0=#passes)
  FILE=FILENAME - filename to write into or read from

Other:
  ADGAINFORCE - Turn off A2Dr13 overdrive tracking algorithm.
  ADWARNOFF - Turn off warning when using ADGAINFORCE.
  ADGAINTRACK - Allow A2Dr13 gain to track signal up/down.
  ADDELAY - Have A2D consume the first 1M samples to cover the gain overdrive adjustment transient.
  EMT - Sets the parameters for the Envelope Measure and Track function
  SPINV - Invert the input spectrum by multiplying every other sample by -1
  MGAIN=N - When using a Tuner or Core port, this can be used to specify the gain setting for the
  MFREQ=N - When using a Tuner or Core port, this can be used to specify the freq setting for the
  NODMA=N - Special DMA buffer handling.