ICETRACER

ICE FPGA trace debug for ICE cards.

ICETRACER - ICE FPGA trace debug for ICE cards

<card>   PIC alias in HW file (i.e. PIC, PIC1, PIC2, ...)
<core>	 the numerical core index. Special: Common=0 PCIe=7
<flags>  list of flags to be added to the device config
<cfg>    path to the source file for the core (with a signal named "tracer")
         or the tracer string itself in curly brackets {}

This command captures a block of debug data from the swrstatdbg module of an 
ICE core or a common tracedbg module and plots it.  
The sourcefile is expected to have a vector named "tracer" which is used to 
annotate the plot.

Switches:
	
 /MODE=mask  - set the debug bit mask - default=3
	Bit=  1:0 - 0=reset 1=oneshot 2=sample 3=fulloneshot (nocompression)
		2 - gated
		3 - invert trigger
	      7:4 - bit in tracer vector for trigger/gate

 /WAIT=sec - number of seconds to wait for trigger and capture (def=0.125)

 /SIZE=n - number of samples to capture

 /PCI  - switch enables special access to the PCIe core 

 /MC  - switch enables access to the Multicore registers