ICECORE

File to file generic CORE library Midas wrapper.

ICECORE - file to file generic CORE library Midas wrapper

<in>     Input file (complex)
<out>    Output file (complex)
<func>   CORE library name (Case sensitive)
<P0..N>  Parameter key=value pairs

This command wraps any ICE-CORE library that can be called with a single input stream,
single output stream, and a generic list of parameters. The CORE library must be in the
$ICEROOT/core/<name> file or the core sub-directory of a Midas option tree.

The generic list of parameters will be called on the CORE library functions in the order
listed on the command line.  They can then be called during operation as real-time controls.

When run with /CORE=I for the ICE implementation of the core, the core must have been previously 
loaded onto the card by performing a reset on the card with the proper flags. For example: 

   PIC RESET PIC1AUTO /flags=PMFPGA=U

If the alias PIC1AUTO has two K8M processor modules, then this loads the file icek8m_rru onto both
of them.  See the help on the PMFPGA flags for more info on load signatures.  

Core generated by icejvcc will have named parameters as defined in <core>.jv.
There are a few reserved parameter names:
  NAME - the name of the core
  XDIO - the ratio of the output sample delta to input sample delta (i.e. Decimation)
  XSIO - the delay in time from the 1st input sample to the 1st output sample 

To run the "User" core control software on the core would look like:

  ICECORE/core=I infile outfile "User" DEC=3 D:FREQ=.123 L:GAIN=10

The "User" core controller has parameters defined in the get and set methods in User.jv.
It is up to the underlying core library to validate each parameter.

Each parameter gets a widget (X-Midas) or setKey (Nextmidas) for real-time control.  

This primitive can be used in conjunction with a SOURCEPIC/SINKPIC command, where the dataflow
is handled by the SOURCE/SINKPIC and the ICECORE is simply for controlling the core's parameters.
Use /CORE=ICEX to invoke this mode. Call ICECORE after the SOURCE/SINKPIC call and leave the input
and output file parameters blank.  See the /TESTCORE branch in the SNAPPER macro for an example.

The ICECORE library defaults to using port CORE11 on card PIC1AUTO, or /COREDEV=PIC1AUTO:11.  

The creation of the auto alias is handled by the ICE AUTO command under NeXtMidas.  

To override the card name, use the /COREDEV=alias switch. 
To override the core port number, use the /COREDEV=alias:portnum switch.

 CSF={
  FN=filename
  DT=time delta
  KEYS=list of keys
  FMT=format
 }

Switches:
  /COREDEV=alias:port  Device alias and core port to use if /CORE=I
  /CORE=x	Type of core to run Java, Cpu, Verilog, or ICE (x=J|C|V|I)
  /COREVBP=x	Core verbose print 0=off 1=verbose 2=debug
  /CFG=tab	Multiple parameters specified in key=vallue table format
  /CSF=tab	Core Status File specification
  /IFMT=n	Override Input file format (SI,CI,SB,CB)
  /OFMT=n	Override Output file format (SI,CI,SB,CB)
  /ITL=n	Input transfer length in elements
  /OTL=n	Output transfer length in elements
  /ILEN=n	Only process n input samples (or -2 for continuous loop)
  /OLEN=n	Finish after n output samples
  /CIN=res	Core In
  /COUT=res	Core Out - export core object for inspection
  /MRT		Mimic Real-Time polling rate during simulation
  /MCID=id	Multi-Channel Core ID
  /XIO		Exercise IO timing to check FPGA pipelines
  /DUMP=1|2|3	Readback parameter values at 1=open 2=close or 3=both