Package nxm.ice.core

Interface Summary

Interface	Description
Modefs

Class Summary

Class	Description
AU2C
AU2C.ChannelState
AU2C.CORE
AU2C.CPU
AU2C.ICE
AU2C.JVM
AWG
AWG.CORE
AWG.CPU
AWG.ICE
AWG.JVM
CFIR
CFIR.CORE
CFIR.CPU
CFIR.ICE
CFIR.JVM
DDC
DDC.CORE
DDC.CPU
DDC.ICE
DDC.JVM
DUC
DUC.CORE
DUC.CPU
DUC.ICE
DUC.JVM
DUC2
DUC2.CORE
DUC2.CPU
DUC2.ICE
DUC2.JVM
FEC
FEC.CORE
FEC.CPU
FEC.ICE
FEC.JVM
Filters
Filters.CxCIC
Filters.CxComb
Filters.CxIIR
Filters.CxIIRStageO1
Filters.CxIIRStageO2
Filters.CxPhasePLL
Filters.Smooth
Filters.SmoothP2
Filters.SmoothP2X
FSVI
FSVI.CORE
FSVI.CPU
FSVI.ICE
FSVI.JVM
HOC	Implements a Hardware (verilog/vhdl) Only Core interface
HOC.CPU
HOC.ICE
HOC.JVM
HOC.VHS
JVM	Simulates PCI Express Bus for ICE PCIE core development.
JVM.VHS
LRS
LRS.CORE
LRS.CPU
LRS.ICE
LRS.JVM
MFPP
MFPP.CORE
MFPP.CPU
MFPP.ICE
MFPP.JVM
MOD
MOD.CORE
MOD.CPU
MOD.ICE
MOD.JVM
Modems
Modems.IFEC
None
None.CORE
None.CPU
None.ICE
None.JVM
Noop
Noop.CORE
Noop.CPU
Noop.ICE
Noop.JVM
PCIe	Simulates PCI Express Bus for ICE PCIE core development.
PCIe.VHS
PKT2DAT
PKT2DAT.CORE
PKT2DAT.CPU
PKT2DAT.ICE
PKT2DAT.JVM
REC
REC.CORE
REC.CPU
REC.ICE
REC.JVM
RFP
RFP.CORE
RFP.CPU
RFP.ICE
RFP.JVM
TFDD
TFDD.CORE
TFDD.CPU
TFDD.ICE
TFDD.JVM
UDAT
UDAT.CORE
UDAT.CPU
UDAT.ICE
UDAT.JVM
UDUC
UDUC.CORE
UDUC.CPU
UDUC.ICE
UDUC.JVM
WBR
WBR.CORE
WBR.CPU
WBR.ICE
WBR.JVM