Help: ICE_GENERAL_RESAMPLING

Resampling Techniques for Digital Tuners


The GrayChip 4016 tuner chips have an optional digital resampler that can be
applied after the Tune-Filter-Decimate stages.  This can be used to create
baud synchronous sample rates for demodulators or 8000Hz for VGC extraction.  
The filters from the GrayChip web site are available as Midas files in the 
DAT directory of the ice tree.  The GC4016 user guide has a detailed 
discussion on the resampler algorithm.  

In short, the tuner output is oversampled by inserting NDELAY-1 zeros between
each tuner output sample.  The resampling ratio is used to determine which of the 
NDELAY fractional sample points to use for each resampler output and runs an NTAP 
filter on that point.  The filters in the ice dat directory are actually NDELAY*NTAP
point symmetric filters.  We call it an NTAP filter because only NTAP of the points
need to be computed since only one in NDELAY taps have non-zero data values.  
The phase jitter introduced by this technique reduces the SNR to about 40dB.

The pic_loadfile(), NDELAY=n flag, RESAMP flag and pic_setKey(KEY_RATIO) function 
are used to setup the resampler.  The resampler ratio is defined as desired output
sample rate divided by the tuner output sample rate.

The NDELAY=n defaults to 32.  If you are not using a filter built for NDELAY=32,
the flag must be added to the config string when loading the filter.  The filter
file names from graychip use the naming convention,  res_<NTAP>x<NDELAY>_<WIDTH>.
For example, the file res_15x32_80 is a 15 tap 80% filter with 32x oversampling.

The PIC5 tuner has a 10 tap resampler inserted between the CFIR and PFIR filters
with an NDELAY=2048.  The CFIR and PFIR filters should be chosen to achieve optimal 
results.  The CFIR is a decimate by 2 filter at 4 times the output rate so a 25% filter
should be selected (the default is dfir_25).  This presents a twice oversampled 
complex waveform to the resampler section.  The resampler increment is a 28 bit
counter with an automatic M over N circuit to preserve exact timing for most ratios.
The accumulator register is reset every M samples to remove binary rounding errors.
The M output samples for each N input samples actually used is displayed if the 
VERBOSE=2 flag is present.  M and N are 16 bit integers. The output is then sent 
through the decimate by 2 PFIR filter for final output conditioning.  

Note that if the real output mode is used with decimation=1, the output will be 
frequency shifted up by (Fso - Fsi)/4, where Fsi is the input frequency to the resampler
and Fso is the output Frequency.  This offset can be removed by tuning off of Fsi/4 
by this amount.

The maximum output bandwidth of the PIC5 tuner is 64MHz.  To preserve the whole 
band use decimation=1 with the AOVSR (auto-oversampling) flag.  The tuner allows
the center frequency to be adjusted for the new output rate.  To disable the 
M over N circuit, user the NORESMON flag.