Help: ICE_GENERAL_FLEXIBILITY

Programmable Hardware Concepts


The 16-bit digital inputs are fed directly into an Field Programmable Gate 
Array.  This part can be re-programmed to perform application specific front
end bit processing.  It is then fed into a SHARC or PowerPC DSP for further 
processing before it is DMA'd into the host computer.  The DSP is programmed 
in C or assembly.  

Standard configurations supported by the default boot code include 1,4,8, 
and 16 bit data packing, various acquisition triggers, and data gates. 

Non-standard configurations might include feeding 8 pairs of clock and data
into a 16 bit input module, or demultiplexing a serial bit stream for follow
on controller processing.

The module sites include a set of master/slave pins which can be used to strap
two modules to begin acquisition/playback on the same clock.  The Series-3 and 
later cards have external access to these signals to synchronize multiple cards.