Help: ICE_SOC_HHF

Mod1=HyperTransport Mod2=HyperTransport Core=Filter


Filter cores replace the tuner cores.

To load the filter coefficients, use
  PICD/PORT=CORE<n> LOADFC <card> <filter file>
where <n> is 1 or 2, and the filter file is a midas file in the aux path.

Or, the operational flag FFIR=<fname>, if the filter tap file <fname> is 
already in the DAT directory of the ICE tree.

Each filter engine currently has 32 reusable MACCs running at 132 MHz.
If the coefficients are symmetric, it cuts the necessary MACCs in half.
Up to 16 coefficients can be stored at each MACC for a maximum 512 tap filter.

This engine can therefore run:
  A 63 tap symmetric filter at 132MHz.
  A 64 tap non-symmetric filter at 64MHz.
  A 127 tap symmetric filter at 64MHz.
  A 127 tap non-symmetric filter at 32MHz.
  A 127 tap decimate by 2 Hilbert at 250MHz.

For information on the filter engine setup, use VERBOSE=2 flag when loading the filter.