A runtime method for connecting the main board JTAG cable connector to one of the I/O or Processor module sites. This allows a developer to use chipscope or other JTAG base debuggers on the module. Port numbers are: 1 - I/O Module 1 2 - I/O Module 2 7 - Processor Module 1 8 - Processor Module 2 The include file names are formed by prepending KEY_.