Help: ICE_GENERAL_OVERSAMPLING

Upsampling Techniques for Digital Tuners


Digital Tuner chips typically have a fixed lower end to the decimation they
support.  This is usually limited by the number of filter taps it can compute 
per output sample.  At low input clock rates, the chips multipliers are not 
used efficiently, unnecessarily limiting the output bandwidth.  One technique
to use more of the chip is to resample the input at a higher rate so there are
more clock cycles available per output sample.  The simplest form is to insert
a fixed number of zeros between each input sample.  This has the affect of 
duplicating the input spectrum N times, where N is the number of zeros 
inserted per sample.

To make software more generic, oversampling is applied to the tuner ports by 
setting the oversampling rate that the tuner inputs will be seeing before the
tuner port is set up.  The only affect on the tuner port will be to relax the 
minimum decimation.  The gain loss from the zero insertion is compensated for
in the pic_tuner library.

The oversampling circuit can also be used to shield the tuner chips from clock
irregularities.  When digital inputs are switched or tape playback machines loose
signal, the clock presented to the ICE-PIC may contain glitches that the tuner
chips cannot recover from.  With an oversampling factor = 1, the input clock 
is conditioned by the IOC gate array to keep glitches from affecting the tuners.

An oversampling factor = 2, inserts 1 zero between each input sample.

The input clock must be < 20MHz to apply the OVSR=1 conditioning.
The oversampled rate (inputrate*OVSR) must be < 40MHz on series 3 cards.
The oversampled rate (inputrate*OVSR) must be <= 100MHz on series 4 cards.